Clock Pulse Generator

For many years the author has been approached by people who have managed to lay hands on an ‘antique’ electric clock and need an alternating polarity pulse driver. This is immediately followed by the question whether an affordable circuit for this is avail-able. The design described here has been working very nicely for years in three of the author’s clocks. To keep the circuit simple and thus inexpensive, the author dispensed with automatic adjustment for summer and winter time.

A 32.768 kHz oscillator is built around IC1. X1 is a crystal of the type that can be found in almost every digital watch, especially the cheaper ones. The frequency can be adjusted with trimmer C1 if necessary.The clock signal is divided by IC1 and IC2 to obtain a signal on CT=6 (pin 6) of IC2 with a frequency of one pulse per minute. IC3.A is wired as a divide-by-2 circuit to maintain a constant signal during each 1-minute period. IC4.E and IC4.F buffer this signal, and IC4.D inverts the output of IC4.F.

Clock Pulse Generator Circuit Diagram

When CT=6 of IC2 goes high, IC3.A receives a clock pulse and its Q output goes High. IC4.F and IC4.D then charge C3 via R6 (1 MΩ), and the output of IC4.C remains low for approximately 1 second. This drives T2 into conduction, and with it T1 and T3. The resulting cur-rent through the clock coil causes the green LED to light up. When CT=6 of IC2 goes high again after 1 minute, IC3.A receives a new clock pulse and its Q output goes Low. Now C4 is charged by IC4.E via R7 and the out-put of IC4.B is low for approximately 1 second, so the output of IC4.A is logic High. This drives T4 into conduction, and with it T5 and T6. The resulting current through the clock coil causes the red LED to light up. In this way the clock is driven by pulses with alternating polarity.

Diode D7 protects the circuit against reverse polarity connection of the supply voltage. Diode D8 is lit constantly when the supply voltage is present. Transistors T7 and T8 provide current limiting if a short circuit occurs in the clock mechanism. The peak pulse cur-rent can be increased by reducing the value of R16 (minimum value 2.2 Ω). Diode D11 is a dual suppressor diode that clips any volt-age spikes that may occur. This diode is fairly expensive, so it was omitted in the circuits actually built. This has not led to any problems up to now, but it may be advisable with heavy-duty clocks or multi-pulse clocks.

Note: this circuit is only suitable for pulse-driven clocks that operate at 12 V. The circuit must be modified for models that operate at 24, 48 or 60 V. As these models are less common, or in many cases can be converted to 12 V operation, this option is not described here.

 

Author : Ed Flier - Copyright: Elektor

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Intermittetly Pulse Generator

The generators of square pulses, are used in a lot of applications, between which the adjustment of conditions of entry in the digital circuits and the control of amplifiers acoustic frequencies. This circuit is a generator that it produces, in combination with a other generator, sine wave frequencies or square pulses, continuous or interrupted square pulses. Main characteristic the generator it is, that the circle of operation can be regulated so as to he is constituted from until ten interrupted pulse.

This pulses are particularly useful for the adjust amplifiers, loudspeaker, rooms of hearings etc. A other qualification of generator are that her pulses have level of report the 0V, without it is used for aim, capacitor in the exit. The absence of capacitor in the exit, has as result the production of clearly square pulses in any frequency of operation. The generator work without perceptible distortion up to their 100KHZ.Her pulses have width 5Vpp (± 2.5V) and cover the needs of all amplifiers acoustic frequencies.

In the cases where we needed signal of smaller width, then we can him decrease with the pontesometer RV1. The generator is supplied with ± 5V, provided from two batteries or from one suitable power supply. Placing the S1, in different places from the 1 until 10, (a place each time), the crowd of output pulses, in each circle of operation can be altered from 1 until 10 and the duration of pause, (when the signal is maintained in the level of 0V), from 9 until 0. The waveform [1] -acquaintance as burst - it is particularly benefit for the control of instability low or high frequency circuits.

How it works?

The circuit of generator that produces the interrupted square pulses and the produced vibrations in various points of circuit, when the selector of switch S1 is (ON), in the place 3, that correspond in exit Q3 of IC2/7. If in entry J1 we apply pulse line, width ± 5V, then these via the S2, enter in the entry of 3 IC1A that is j-k flip-flop as T, with a view to it ensures in the circuits that follow, pulses with reason of duration to period 50%. Become division of frequency pulses, via 2. Thus in the exit Q-IC1A/1, are presented pulses with submultiples frequency.

This pulses are applied in entry CLK, the IC2/14 and in a entry of IC3Α. The IC2 is one decimal counter with decode exits. Each pulse of entry makes [ H ], one from his exits and concretely the one that corresponds in the content of enumeration. In the first pulse of entry, [ H ] becomes only exit Q1, of counter, while all the other are maintained in [ L]. The second pulse of entry makes [ H ], the exit Q2, third the Q3. The tenth pulse annihilates the content counter and it makes [ H ] the exit Qo, in order to is repeated the same circle of operation for the next pulses, entering pulse line. The number of pulses that will pass to the exit of generator is checked from counter, the flip-flop IC1B, and gate IC3Α. In the particular application the logic [ H ] corresponds in + 5V and the logic [ 0 ] from the -5v. Proportionally the place that will be placed switch S1, is checked the number of pulses that will pass to the exit of generator.

In the last place of S1 (place 10), flip-flop IC1B does not make RESET, so that are presented pulses continuity in the exit of generator. In the last place of S1 (place 10), flip-flop IC1B does not make RESET, so that are presented pulses continuity in the exit of generator. The output stage of generator, gives the three different levels of level that we needed: the output positive voltage it is created by the drive of Q2, in the satiation and Q3 in the cutting off, null from the cutoff of also two transistors and negative from the control of Q2 in the cutoff and Q3 in the satiation. The signal is applied in exit J2 via the pontesometer RV1, that with the R8, gives output impedance 600R. Can we change sine wave, triangular etc, signals in square pulses with the circuit of entry, that is constituted by the gates IC3B-C-D. The choice direct or transformation, the entering signals, becomes from switch S2. Switch S1, can be also replaced from a switching switch of 10 places, good quality. The supply becomes from two batteries NiCd, but can become also from suitable power supply. The essential stabilisation of voltage, becomes from the two diodes zener.

Parts List :

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Triangular Wave Oscillator

This design resulted from the need for a partial replacement of the well-known 8038 chip,  which is no longer in production and there fore hardly obtainable.

An existing design for driving an LVDT sensor (Linear Variable Differential Transformer),  where the 8038 was used as a variable sine  wave oscillator, had to be modernised. It may  have been possible to replace the 8038 with an  Exar 2206, except that this chip couldn’t be used  with the supply voltage used. For this reason we  looked for a replacement using standard components, which should always be available.

Circuit diagram :

Triangular Wave Oscillator Circuit Diagram

In this circuit two opamps from a TL074 (IC1.A  and B) are used to generate a triangular wave,  which can be set to a wide range of frequencies using P1. The following differential amplifier using T1 and T2 is configured in such a way  that the triangular waveform is converted into  a reasonably looking sinusoidal waveform. P2  is used to adjust the distortion to a minimum.

The third opamp (IC1.C) is configured as a  difference amplifier, which presents the sine  wave at its output. This signal is then buffered by the last opamp (IC1.D). Any offset at the  output can be nulled using P3.

 

Author : Jac Hettema - Copyright : Elektor

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Digital Dice With 7-Segment Display

A digital dice circuit can be easily realised using an astable oscillator circuit followed by a counter, display driver and a display. Here we have used a timer NE555 as an astable oscillator with a frequency of about 100 Hz. Decade counter IC CD4026 or CD4033 (which-ever available) can be used as counter-cum-display driver. When using CD4026, pin 14 (cascading output) is to be left unused (open), but in case of CD4033, pin 14 serves as lamp test pin and the same is to be grounded.

Circuit diagram : 

Digital Dice With 7-Segment Display Circuit diagram

The circuit uses only a handful of components. Its power consumption is also quite low because of use of CMOS ICs, and hence it is well suited for battery operation. In this circuit two tactile switches S1 and S2 have been pro-vided. While switch S2 is used for initial resetting of the display to ‘0,’ depression of S1 simulates throwing of the dice by a player.

When battery is connected to the circuit, the counter and display section around IC2 (CD4026/4033) is energised and the display would normally show ‘0’, as no clock input is available. Should the display show any other decimal digit, you may press re-set switch S2 so that display shows ‘0’. To simulate throwing of dice, the player has to press switch S1, briefly. This ex-tends the supply to the astable oscillator configured around IC1 as well as capacitor C1 (through resistor R1), which charges to the battery voltage. Thus even after switch S1 is released, the astable circuit around IC1 keeps producing the clock until capacitor C1 discharges sufficiently. Thus for du-ration of depression of switch S1 and discharge of capacitor C1 thereafter, clock pulses are produced by IC1 and applied to clock pin 1 of counter IC2, whose count advances at a frequency of 100 Hz until C1 discharges sufficiently to deactivate IC1.

When the oscillations from IC1 stop, the last (random) count in counter IC2 can be viewed on the 7-segment display. This count would normally lie between 0 and 6, since at the leading edge of every 7th clock pulse, the counter is reset to zero. This is achieved as follows.

Observe the behavior of ‘b’ segment output in the Table. On reset, at count 0 until count 4, the segment ‘b’ output is high. At count 5 it changes to low level and remains so during count 6. However, at start of count 7, the output goes from low to high state. A differentiated sharp high pulse through C-R combination of C4-R5 is applied to reset pin 15 of IC2 to reset the output to ‘0’ for a fraction of a pulse period (which is not visible on the 7-segment display). Thus, if the clock stops at seventh count, the display will read zero. There is a probability of one chance in seven that display would show ‘0.’ In such a situation, the concerned player is given an-other chance until the display is non-zero.

Note.  Although it is quite feasible to inhibit display of ‘0’ and advance the counter by ‘1,’ the same makes the circuit somewhat complex and there-fore such a modification has not been attempted.

 

Author : EFY LAb – Copyright : EFY

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Micropower Crystal Oscillator

Crystal oscillators for digital circuits are normally built as Pierce oscillators with an inverter.The inverter operates as a linear amplifier and thus requires extra current. But you can also build a crystal oscillator using an  operational amplifier (op amp for short)! If a  very low frequency is involved, for instance  32.768 kHz (commonly used for clocks), you can get away with a comparatively ‘slow’ micro power op amp.

Circuit diagram :

Micropower Crystal Oscillator Circuit Diagram

In the sample circuit shown a widely avail-able TLC271 is used. On pin 8 we have the  opportunity to set the ‘bias mode’, with three  choices ranging between fast operation with  higher current consumption and slower operation at low current. For our clock crystal the middle setting will suit us fine. Pin 8 is there-fore connected to the voltage divider R1/R2. The current consumption of the entire circuit  is impressively modest and at 5 V this is just  56 µA! The oscillator also functions astoundingly well at 3.3 V. At the same time the cur-rent drops to a more battery-friendly 41 µA. A  prototype built in the Elektor Labs produced  the slightly higher values indicated in the circuit diagram.

The output signal delivered by this circuit has  admittedly scant similarity to a square wave.  Nevertheless some cosmetic surgery will tidy  this up, with treatment in the Schmitt trigger  following. To save current (naturally) we use  a CMOS device such as the 74HC14.

Author :Rainer Reusch - Copyright :Elektor

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Speech Filter

In communications receivers and microphone amplifiers for transmitting equipment, there is frequently a need for a narrow, low-frequency band-pass filter that lets only the voice band through. This band is usually defined to be the portion of the audio frequency spectrum between approximately 300 Hz and 3300 Hz. In order to implement such a filter, we have calculated the values for two fifth-order Butterworth filters having these corner frequencies and connected them in series. The result is a band-pass filter for the desired pass-band with a skirt steepness of 100 dB/decade.  The first opamp (IC1) acts as a buffer.

Speech Filter Image :

The circuit can be powered by a unipolar supply voltage between 5 V and 18 V, which is a broad enough range that it should always be possible to find a suitable voltage when building the filter into existing equipment. The current consumption of the filter is only a few milliampères, which should rarely pose a problem. There is fairly wide selection of suitable candidates for the opamps, since the circuit is not critical in this regard. In addition to the indicated OP27A, you could consider using a TL081N or even an old-fashioned 741.

Circuit diagram : 

Speech Filter Circuit Diagram

Due to unavoidable spreads in component values, the pass-band curve of the filter will never be completely perfect in actual practice. However, the deviations will be very small and in any case inaudible. In the pass-band region, the gain is approximately unity. The printed circuit board design shown here allows the speech filter to be built in a very compact form, which can be an important factor if it must be fitted into existing equipment. You can quickly check the fully assembled circuit by momentarily measuring the voltages at the inputs and out-puts of the three opamps. Half of the supply voltage should be present at all of these locations.

PCB Layout :

Parts LIST:

Resistors:
R1.R2 = 22kΩ
R3,R11,R12,R18,R19 = 100kΩ
R4 = 470Ω
R5 = 150Ω
R6 = 10kΩ
R7 = 18kΩ
R8 = 15kΩ
R9 = 33kΩ
R10 = 82kΩ
R13-R17 = 3kΩ3

Capacitors:

C1,C8,C14,C15 = 100nF
C2 = 1µF MKT
C3-C7,C11 = 22nF
C9 = 33nF
C10 = 18nF
C12 = 10nF
C13 = 4nF7
C16,C17 = 10µF 16V

Semiconductors:

IC1,IC2,IC3 = OP27A, TL081CN

Miscellaneous:

Bt1 = 9-V battery

Author: G.Baars  - Copyright : Elektor Electronics

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Comparator Based Crystal Oscillator

Although a simple crystal oscillator may be built from one comparator of an LT1720/LT1721, this will suffer from a number of inherent shortcomings and design problems. Although the LT1720/LT1721 will give the correct logic output when one input is outside the common mode range, additional delays may occur when it is so operated, opening the possibility of spurious operating modes. Therefore, the DC bias voltages at the inputs have to be set near the center of the LT1720/LT1721’s common mode range and a resistor is required to attenuate the feedback to the non-inverting input. Unfortunately, although the output duty cycle for this circuit is roughly 50%, it is affected by resistor tolerances and, to a lesser extent, by comparator offsets and timings.

If a 50% duty cycle is required, the circuit shown here creates a pair of complementary outputs with a forced 50% duty cycle. Crystals are narrow-band elements, so the feedback to the non-inverting input is a filtered analogue version of the square-wave output. The crystal’s path provides resonant positive feedback and stable oscillation occurs. Changing the non-inverting reference level can vary the duty cycle. The 2k-680Ω resistor pair sets a bias point at the comparator + (Comparator IC1a) and – (Comparator IC1b) input. At the complementary input of each comparator, the 2k-1.8k-0.1µF path sets up an appropriate DC average level based on the output.

IC1b creates a complementary output to IC1a by comparing the same two nodes with the opposite input. IC2 compares band-limited versions of the outputs and biases IC1a’s negative input. IC1a’s only degree of freedom to respond is variation of pulse width; hence the outputs are forced to 50% duty cycle. The circuit operates from 2.7V to 6V. When ‘scoping the oscillator output signal, a slight dependence on comparator loading, will be noted, so equal and resistive loading should be used in critical applications. The circuit works well because of the two matched delays and rail-to-rail outputs of the LT1720.

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Voice Bandwidth Filter

This circuit passes frequencies in the 300Hz - 3.1kHz range, as present in human speech. The circuit consists of cascaded high-pass and low-pass filters, which together form a complete band-pass filter. One half of a TL072 dual op amp (IC1a) together with two capacitors and two resistors make up a second-order Sallen-Key high-pass filter. With the values shown, the cut-off frequency (3dB point) is around 300Hz. As the op amp is powered from a single supply rail, two 10kO resistors and a 10µF decoupling capacitor are used to bias the input (pin 5) to one-half supply rail voltage.

Circuit diagram:

Voice Bandwidth Filter Circuit Diagram

The output of IC1a is fed into the second half of the op amp (IC1b), also configured as a Sallen-Key filter. However, this time a low-pass function is performed, with a cut-off frequency of about 3.1kHz. The filter component values were chosen for Butterworth response characteristics, providing maximum pass-band flatness. Overall voltage gain in the pass-band is unity (0dB), with maximum input signal level before clipping being approximately 3.5V RMS. The 560O resistor at IC1b's output provides short-circuit protection.

Author: M. Sharp - Copyright: Silicon Chip Electronics

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